CY7C1318AV18 architecture equivalent, 18-mbit ddr-ii sram 2-word burst architecture.
* 18-Mb density (2M x 8, 1M x 18, 512K x 36)
* 250-MHz clock for high bandwidth
* 2-Word burst for reducing address bus frequency
* Double Data Rate (DDR).
The CY7C1316AV18/CY7C1318AV18/CY7C1320AV18 are 1.8V Synchronous Pipelined SRAM equipped with DDR-II architecture. The DDR-II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Addresses for Read and Wri.
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