CY7C1297F sram equivalent, 1-mbit (64k x 18) flow-through sync sram.
* 64K x 18 common I/O
* 3.3V
–5% and +10% core power supply (VDD)
* 3.3V I/O supply (VDDQ)
* Fast clock-to-output times — 6.5 ns (133-MHz .
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The CY7C1297F is a 131,072 x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is
Logic Block Diagram
A0,A1,A MODE ADV CLK ADDRESS REGISTER A[1:0] BURST Q1.
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