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CY7C1212H - 1-Mbit (64K x 18) Pipelined Sync SRAM

Description

The CY7C1212H SRAM integrates 64K x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.

All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).

Features

  • Registered inputs and outputs for pipelined operation.
  • 64K × 18 common I/O architecture.
  • 3.3V core power supply (VDD).
  • 2.5V/3.3V I/O power supply (VDDQ).
  • Fast clock-to-output times.
  • 3.5 ns (for 166-MHz device).
  • Provide high-performance 3-1-1-1 access rate.
  • User-selectable burst counter supporting Intel® Pentium® interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synch.

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Part Number Description
CY7C1212F 1-Mbit (64K x 18) Pipelined Sync SRAM
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CY7C1212H www.DataSheet4U.com 1-Mbit (64K x 18) Pipelined Sync SRAM Features • Registered inputs and outputs for pipelined operation • 64K × 18 common I/O architecture • 3.3V core power supply (VDD) • 2.5V/3.3V I/O power supply (VDDQ) • Fast clock-to-output times — 3.
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