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CY7C1007 - (CY7C107 / CY7C1007) 1M x 1 Static RAM

Download the CY7C1007 datasheet PDF. This datasheet also covers the CY7C107 variant, as both devices belong to the same (cy7c107 / cy7c1007) 1m x 1 static ram family and are provided as variant models within a single manufacturer datasheet.

General Description

The CY7C107 and CY7C1007 are high-performance CMOS static RAMs organized as 1,048,576 words by 1 bit.

Key Features

  • High speed.
  • tAA = 12 ns.
  • CMOS for optimum speed/power.
  • Low active power.
  • 825 mW.
  • Low standby power.
  • 275 mW.
  • 2.0V data retention (optional).
  • 100 µW.
  • Automatic power-down when deselected.
  • TTL-compatible inputs and outputs memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. These devices have an automatic power-down feature that reduces power consumption by more th.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C107_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com CY7C107 CY7C1007 1M x 1 Static RAM Features • High speed — tAA = 12 ns • CMOS for optimum speed/power • Low active power — 825 mW • Low standby power — 275 mW • 2.0V data retention (optional) — 100 µW • Automatic power-down when deselected • TTL-compatible inputs and outputs memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. These devices have an automatic power-down feature that reduces power consumption by more than 65% when deselected. Writing to the devices is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the input pin (DIN) is written into the memory location specified on the address pins (A0 through A19).