CY62256V Datasheet | Cypress

1CY 622 56 V fax id: 1069 PRELIMINARY 32K x 8 Static RAM Features - - - - - - - - 55, 70 ns access time CMOS for optimum speed/power Wide voltage range: 2.7V- 3.6V Low active power (70 ns, LL version) - 108 mW (max.) Low standby power (70 ns, LL version) - 18 µW (max.) Easy memory expansion with CE and OE Features TTL-patible inputs and outputs Automatic power-down when deselected LOW output enable (OE) and three-state drivers. This device has an automatic power-down feature, reducing the power consumption by 98% when deselected. The CY62256V is in the standard 450-mil-wide (300-mil body width) SOIC, TSOP, and reverse TSOP packages. An active LOW write enable signal (WE)...