B9948L
Features
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- 160-MHz clock support 2.5V or 3.3V output capability 200-ps maximum output-to-output skew LVPECL or LVCMOS/LVTTL clock input LVCMOS/LVTTL patible inputs 12 clock outputs: drive up to 24 clock lines Synchronous Output Enable Output Three-state control Pin patible with MPC948L Industrial temp. range:
- 40°C to +85°C 32-pin TQFP package
Description
The B9948L is a low-voltage clock distribution buffer with the capability to select either a differential LVPECL or a LVCMOS/ LVTTL patible input clock. The two clock sources can be used to provide for a test clock as well as the primary system clock. All other control inputs are LVCMOS/LVTTL patible. The twelve outputs are 2.5V or 3.3V LVCMOS or LVTTL patible and can drive two series-terminated 50Ω transmission lines. With this capability the B9948L has an effective fanout of 1:24. The outputs can also be three-stated via the threestate input TS#. Low output-to-output skews make the B9948L an ideal clock...
