6116A Description
the memory location specified on the adĆ dress pins (A 0 through A 10). ReadingthedeviceisacplishedbytakĆ ing chip enable (CE) and output enable (OE) LOW while write enable (WE ) reĆ mains HIGH.Undertheseconditions,the contents of the memory location specified on the address pins will appear on the I/O pins. The I/O pins remain in highĆimpedance state when chip enable (CE ) is HIGH or write enable (WE) is LOW.