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CY8C6144AZQ-S4F92 Datasheet Cypress

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Features and Benefits

Note: In PSoC 61 the Cortex M0+ is reserved for system functions, and is not available for applications. 32-bit Dual CPU Subsystem
■ 150-MHz Arm® Cortex®-M4F (CM4) with single-cycle multiply (Floatin.

CY8C6144AZQ-S4F92 CY8C6144AZQ-S4F92 CY8C6144AZQ-S4F92
TAGS
PSoC-61
MCU
CY8C6144AZQ-S4F92
CY8C6144AZQ-S4F93
CY8C6144AZI-S4F12
Cypress

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