CY7C4221
Overview
- High-speed, low-power, first-in first-out (FIFO) memories ❐ 1 K × 9 (CY7C4221) ❐ 2 K × 9 (CY7C4231)
- High-speed 66.7 MHz operation (15 ns read/write cycle time)
- Low power (ICC = 35 mA)
- Fully asynchronous and simultaneous read and write operation
- Empty, Full, and Programmable Almost Empty and Almost Full status flags
- TTL-compatible
- Output Enable (OE) pin to three-state the output bus
- Independent read and write enable pins
- Center power and ground pins for reduced noise
- Width-expansion capability
