SCG4521 generators equivalent, synchronous clock generators.
* Dual 19.44 MHz Input References
* Primary 155.52 MHz LVPECL Outputs with Disable Function
* Secondary 51.84 MHz CMOS Output
* Phase Locked Output Freque.
The SCG4521 is a mixed-signal phase locked loop generating LVPECL outputs from an intrinsically low jitter, voltage controlled, crystal oscillator. The LVPECL outputs may be disabled. The SCG4521 can lock to one of two external references, which is s.
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