SCG4521
Description
The SCG4521 is a mixed-signal phase locked loop generating LVPECL outputs from an intrinsically low jitter, voltage controlled, crystal oscillator.
Key Features
- Dual 19.44 MHz Input References
- Primary 155.52 MHz LVPECL Outputs with Disable Function
- Secondary 51.84 MHz CMOS Output
- Phase Locked Output Frequency Control
- Intrinsically Low Jitter Crystal Oscillator
- LOR & LOL Alarm
- Force Free Run Function
- Automatic Free Run operation on loss of both References A & B
- Input Duty Cycle Tolerant
- 3.3V dc Power Supply Bulletin Page Revision Date Issued By SG036 1 of 16 A02 25 Oct 01 MBatts
