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Cirrus Logic
Cirrus Logic

CS8420 Datasheet Preview

CS8420 Datasheet

DIGITAL AUDIO SAMPLE RATE CONVERTER

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CS8420 pdf
CS8420
Digital Audio Sample Rate Converter
Features
General Description
 Complete IEC60958, AES3, S/PDIF, EIAJ
CP1201-compatible Transceiver with
Asynchronous Sample Rate Converter
 Flexible 3-wire Serial Digital I/O Ports
 8-kHz to 108-kHz Sample Rate Range
www.DataSheet4U.com
 1:3 and 3:1 Maximum Input to Output Sample
Rate Ratio
 128 dB Dynamic Range
 -117 dB THD+N at 1 kHz
 Excellent Performance at Almost a 1:1 Ratio
 Excellent Clock Jitter Rejection
 24-bit I/O Words
 Pin and Microcontroller Read/Write Access to
Channel Status and User Data
 Microcontroller and Stand-Alone Modes
The CS8420 is a stereo digital audio sample rate con-
verter (SRC) with AES3-type and serial digital audio
inputs, AES3-type and serial digital audio outputs, and
includes comprehensive control ability via a 4-wire mi-
crocontroller port. Channel status and user data can be
assembled in block-sized buffers, making
read/modify/write cycles easy.
Digital audio inputs and outputs may be 24, 20, or 16
bits. The input data can be completely asynchronous to
the output data, with the output data being synchronous
to an external system clock.
The CS8420 is available in a 28-pin SOIC package in
both Commercial (-10º to +70º C) and Automotive
grades (-40º to +85º C). The CDB8420 Customer Dem-
onstration board is also available for device evaluation
and implementation suggestions.
Please refer to “Ordering Information” on page 93 for or-
dering information.
Target applications include CD-R, DAT, MD, DVD and
VTR equipment, mixing consoles, digital audio trans-
mission equipment, high-quality D/A and A/D
converters, effects processors, and computer audio
systems.
VA+ AGND FILT RERR RMCK
VD+ DGND
ILRCK
ISCLK
SDIN
RXP
RXN
Serial
Audio
Input
Sample
Rate
Converter
Serial
Audio
Output
OLRCK
OSCLK
SDOUT
Receiver
Clock & AES3
Data
S/PDIF
Recovery Decoder
C & U bit
Data
Buffer
AES3
S/PDIF
Encoder
Driver
TXP
TXN
Misc.
Control
Control
Port &
Registers
Output
Clock
Generator
H/S RST
EMPH U TCBL SDA/ SCL/ AD1/ AD0/ INT
CDOUT CCLK CDIN CS
OMCK
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
APRIL '07
DS245F4



Cirrus Logic
Cirrus Logic

CS8420 Datasheet Preview

CS8420 Datasheet

DIGITAL AUDIO SAMPLE RATE CONVERTER

No Preview Available !

CS8420 pdf
CS8420
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 6
SPECIFIED OPERATING CONDITIONS .............................................................................................. 6
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 6
PERFORMANCE SPECIFICATIONS .................................................................................................... 7
DIGITAL FILTER CHARACTERISTICS ................................................................................................. 7
DC ELECTRICAL SPECIFICATIONS .................................................................................................... 7
DIGITAL INPUT CHARACTERISTICS .................................................................................................. 8
DIGITAL INTERFACE SPECIFICATIONS ............................................................................................. 8
TRANSMITTER CHARACTERISTICS .................................................................................................. 8
SWITCHING CHARACTERISTICS ....................................................................................................... 8
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS .............................................................. 9
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI™ MODE ............................................. 10
www.DataSheet4U.com SWITCHING CHARACTERISTICS - CONTROL PORT - I²C® MODE ............................................... 11
2. TYPICAL CONNECTION DIAGRAM ................................................................................................... 12
3. GENERAL DESCRIPTION ................................................................................................................... 13
4. DATA I/O FLOW AND CLOCKING OPTIONS ..................................................................................... 14
5. SAMPLE RATE CONVERTER (SRC) .................................................................................................. 18
5.1 Dither ............................................................................................................................................. 18
5.2 SRC Locking, Varispeed and the Sample Rate Ratio Register ..................................................... 18
6. THREE-WIRE SERIAL AUDIO PORTS ............................................................................................... 19
7. AES3 TRANSMITTER AND RECEIVER .............................................................................................. 22
7.1 AES3 Receiver ............................................................................................................................... 22
7.1.1 PLL, Jitter Attenuation, and Varispeed .................................................................................. 22
7.1.2 OMCK Out On RMCK ........................................................................................................... 22
7.1.3 Error Reporting and Hold Function ........................................................................................ 22
7.1.4 Channel Status Data Handling .............................................................................................. 23
7.1.5 User Data Handling ............................................................................................................... 23
7.1.6 Non-Audio Auto Detection ..................................................................................................... 24
7.2 AES3 Transmitter ........................................................................................................................... 24
7.2.1 Transmitted Frame and Channel Status Boundary Timing ................................................... 24
7.2.2 TXN and TXP Drivers ............................................................................................................ 25
7.3 Mono Mode Operation ................................................................................................................... 25
8. AES3 TRANSMITTER AND RECEIVER .............................................................................................. 28
8.1 Sample Rate Converter ................................................................................................................. 28
8.2 Non-SRC Delay ............................................................................................................................. 29
9. CONTROL PORT DESCRIPTION AND TIMING ................................................................................. 30
9.1 SPI Mode ....................................................................................................................................... 30
9.2 I²C Mode ........................................................................................................................................ 31
9.3 Interrupts ........................................................................................................................................ 31
10. CONTROL PORT REGISTER BIT DEFINITIONS ............................................................................. 32
10.1 Memory Address Pointer (MAP) .................................................................................................. 32
10.2 Miscellaneous Control 1 (01h) ..................................................................................................... 34
10.3 Miscellaneous Control 2 (02h) ..................................................................................................... 35
10.4 Data Flow Control (03h) ............................................................................................................... 36
10.5 Clock Source Control (04h) .......................................................................................................... 37
10.6 Serial Audio Input Port Data Format (05h) ................................................................................... 38
10.7 Serial Audio Output Port Data Format (06h) ................................................................................ 39
10.8 Interrupt 1 Register Status (07h) (Read Only) ............................................................................. 40
10.9 Interrupt Register 2 Status (08h) (Read Only) ............................................................................. 41
10.10 Interrupt 1 Register Mask (09h) ................................................................................................. 41
10.11 Interrupt Register 1 Mode Registers MSB & LSB (0Ah,0Bh) ..................................................... 41
10.12 Interrupt 2 Register Mask (0Ch) ................................................................................................. 42
2 DS245F4


Part Number CS8420
Description DIGITAL AUDIO SAMPLE RATE CONVERTER
Maker Cirrus Logic
Total Page 30 Pages
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