CS5511 Datasheet | Cirrus Logic

Features z Delta-sigma Analog-to-digital Converter - Linearity Error: 0.0015% FS - Noise-free Resolution: Up to 17 Bits z Differential .. General Description The CS5510/11/12/13 are low-cost, easy-to-use, ∆Σ analog-to-digital converters (ADCs) which use chargebalance techniques to achieve 16-bit (CS5510/11) and 20-bit (CS5512/13) performance. The ADCs are available in a space-efficient, 8-pin SOIC package and are optimized for measuring signals in weigh scale, process control, and other industrial applications. To acmodate these applications, the ADCs include a fourth-order ∆Σ modulator and a digital filter. When configured with an external master clock of 32.768 k Hz, the filter in the CS5510/12 provides better than 80 d B of simultaneous 50 and 60 Hz line rejection, and outputs conversion words at 53.5 Sps. The CS5511/13 include an on-chip oscillator which eliminates the need for an external clock source. Low-power, flexible supply configurations, pact pinout, and ease of use make these products ideal solutions for cost-conscience and space-constrained applications. Bipolar Analog Inputs z VREF z 50/60 z 16 Input Range from 250 m V to 5 V Hz Simultaneous Rejection (CS5510/12) to 326 Sps Output Word Rate Oscillator (CS5511/13) z On-chip z Power Supply Configurations: - V+ = 5 V, V- = 0 V - Multiple Dual-supply Arrangements z Low Power Consumption - Normal Mode, 2.5 m W - Sleep Mode, 10 µW z Low-cost, z Lead-free pact, 8-pin Package Device Package Options ORDERING INFORMATION See page 23. V+ AIN+ 1X AINVREF ~0.8X Differential 4th-order Delta-sigma Modulator CS Digital Filter Output Control Logic SDO SCLK Oscillator (CS5511/13 only) VClock Gen. (CS5510/12 only) http://.cirrus. Copyright © Cirrus Logic, Inc. 2005 (All Rights Reserved) AUG ‘05 DS337F3 CS5510/11/12/13 TABLE OF CONTENTS 1. CHARACTERISTICS AND SPECIFICATIONS 4 ANALOG CHARACTERISTICS...