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Cirrus Logic

CS5371 Datasheet Preview

CS5371 Datasheet

Low-power High-performance Modulators

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CS5371
CS5372
Low-power, High-performance ∆Σ Modulators
Features & Description
z Fourth-order ∆Σ Architecture
z Clock-jitter-tolerant Architecture
z Input Voltage: 5 Vpp Fully Differential
z High Dynamic Range
Π127 dB SNR @ 215 Hz BW (2 ms Output)
Π124 dB SNR @ 430 Hz BW (1 ms Output)
z Low Total Harmonic Distortion
Π-118 dB THD Typical, -112 dB THD Maximum
z Low Power Consumption
ΠNormal Mode: 25 mW per Channel
ΠLow-power Mode: 15 mW per Channel
z Small Footprint, 24-pin SSOP Package
z Single- or Multi-channel System Support
Π1-channel System: CS5371
Π2-channel System: CS5372
Π3-channel System: CS5371 + CS5372
Π4-channel System: CS5372 + CS5372
z Single or Dual Power Supply Configurations
ΠVA+ = +5 V; VA- = 0 V; VD = +3.3 V to +5 V
ΠVA+ = +2.5 V;VA- = -2.5 V;VD = +3.3 V
Description
The CS5371 and CS5372 are one- and two-channel,
high dynamic range, fourth-order ∆Σ modulators intend-
ed for geophysical and sonar applications. Used in
combination with the CS5376A or CS5378 digital filters,
a unique high-resolution A/D measurement system
results.
The CS5371 and CS5372 have high dynamic range
(127 dB @ 215 Hz bandwidth) and low total harmonic
distortion (typically -118 dB THD), with very low power
consumption per channel. In normal mode
(LPWR=0, MCLK=2.048MHz), power consumption is
25 mW per channel, and in low-power mode
(LPWR=1, MCLK=1.024MHz), power consumption is
15 mW per channel. Each modulator can be indepen-
dently powered down to 1 mW per channel, and by
halting the input clock, they will enter a micropower state
using only 10 µW per channel.
The modulators generate an oversampled serial bit
stream at 512 kbits per second when operated from a
clock frequency of 2.048 MHz. They are available in a
small 24-pin SSOP package, providing exceptional per-
formance in a very small footprint.
ORDERING INFORMATION
See page 21.
VA+ PWDN
VD
INF+
INR+ 4TH ORDER
INR- ∆−Σ MODULATOR
INF-
VREF+
VREF-
CS5371
VA-
CLOCK
GENERATOR
OFST LPWR DGND
MFLAG
MDATA
MCLK
MSYNC
INF1+
INR1+
INR1-
INF1-
VREF+
VREF-
INF2+
INR2+
INR2-
INF2-
VA+ PWDN1
VD
4TH ORDER
∆−Σ MODULATOR
MFLAG1
MDATA1
CLOCK
GENERATOR
MCLK
MSYNC
4TH ORDER
∆−Σ MODULATOR
MFLAG2
MDATA2
CS5372
VA-
PWDN2 OFST LPWR
DGND
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
OCT ‘05
DS255F3




Cirrus Logic

CS5371 Datasheet Preview

CS5371 Datasheet

Low-power High-performance Modulators

No Preview Available !

CS5371 CS5372
TABLE OF CONTENTS
1. CHARACTERISTICS & SPECIFICATIONS................................................... 3
ANALOG CHARACTERISTICS .................................................................. 3
DIGITAL CHARACTERISTICS ................................................................... 5
ABSOLUTE MAXIMUM RATINGS ............................................................. 5
SWITCHING CHARACTERISTICS ............................................................ 6
2. GENERAL DESCRIPTION. ........................................................................... 7
3. MODULATOR PERFORMANCE ................................................................... 9
3.1. Full-scale Signal Performance ........................................................... 9
3.2. Noise Performance ............................................................................ 9
4. SIGNAL INPUTS ........................................................................................... 9
4.1. Differential Inputs - INR+/-, INF+/- ..................................................... 9
4.2. Anti-alias Filters ............................................................................... 10
4.3. Input Impedance .............................................................................. 10
4.4. Maximum Signal Levels ................................................................... 10
5. INPUT OFFSET ........................................................................................... 10
5.1. Offset Enable - OFST ...................................................................... 11
5.2. Offset Drift........................................................................................ 11
6. VOLTAGE REFERENCE INPUTS .............................................................. 11
6.1. Voltage Reference Configurations ................................................... 12
6.2. VREF Input Impedance.................................................................... 12
6.3. Gain Accuracy.................................................................................. 12
6.4. Gain Drift.......................................................................................... 12
7. DIGITAL FILTER INTERFACE ................................................................... 12
7.1. Modulator Clock - MCLK.................................................................. 13
7.2. Modulator Data - MDATA................................................................. 13
7.3. Modulator Sync - MSYNC................................................................ 13
7.4. Modulator Flag - MFLAG ................................................................. 13
8. POWER MODES ......................................................................................... 14
8.1. Normal Power Mode ........................................................................ 14
8.2. Low Power Mode - LPWR................................................................ 14
8.3. Power Down Mode - PWDN ............................................................ 14
8.4. Micro-power Mode ........................................................................... 14
9. POWER SUPPLY ........................................................................................ 14
9.1. Power Supply Configurations........................................................... 14
9.2. Power Supply Bypassing ................................................................. 14
9.3. SCR Latch-up Considerations ......................................................... 15
9.4. DC-DC Converter Considerations.................................................... 15
9.5. Power Supply Rejection................................................................... 15
10. PIN DESCRIPTION - CS5371 ..................................................................... 16
11. PIN DESCRIPTION - CS5372 ..................................................................... 18
12. PACKAGE DIMENSIONS ............................................................................ 20
13. ORDERING INFORMATION ....................................................................... 21
14. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION.. 21
15. REVISION HISTORY ................................................................................... 21
2 DS255F3


Part Number CS5371
Description Low-power High-performance Modulators
Maker Cirrus Logic
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CS5371 Datasheet PDF






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