CS2501 Datasheet

Features and Benefits

• I²C/SPI control port
• Fractional clock multiplier and jitter reduction using hybrid analog/digital PLL — Generates low-jitter 6
  –75 MHz clock (CLK_OUT), synchronized to a 50 Hz
  –30 MHz low-quality or intermittent frequency reference (CLK_IN)
• Flexible timing reference source — External clock, ex.