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Cirrus Logic

CS1600 Datasheet Preview

CS1600 Datasheet

Low-cost PFC Controller

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CS1600
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Low-cost PFC Controller for Electronic Ballasts
Features & Description
Lowest PFC System Cost for Electronic Ballasts
Variable Frequency Discontinuous Conduction Mode
Improved Efficiency Due to Variable Switching Frequency
EMI Signature Reduction from Digital Noise Shaping
Integrated Feedback Compensation
Overvoltage Protection with Hysteresis
Overpower Protection with Shutdown
UVLO with Wide Hysteresis
Thermal Shutdown with Hysteresis
Description
CS1600 is a high-performance Variable Frequency Discontinu-
ous Conduction Mode (VF - DCM), active Power Factor
Correction (PFC) controller, optimized to deliver the lowest PFC
system cost for electronic ballast applications.
A variable ON time / variable frequency algorithm is used to
achieve near unity power factor. This algorithm spreads the EMI
frequency spectrum, which reduces the conducted EMI filtering
requirements. The feedback loop is closed through an integrated
compensation network within the IC, eliminating the need for
additional external components. Protection features such as
overvoltage, overcurrent, overpower, open- and short-circuit pro-
tection, overtemperature, and brownout help protect the device
during abnormal transient conditions.
Pin Assignments
NC 1
8 NC
STBY 2
7 VDD
IAC 3
6 GD
FB 4
5 GND
8-lead SOIC
D5
L1
BR1
AC
Mains
BR1
R1a RAC
BR1
R1b CS1600
1
R1c NC
C1
3
IAC
2
STBY
4
FB
+12V
7
VDD
6
GD
BR1
C2 8
NC
5
GND
R3
D6
R2a
RFB
R2b
R2c
Q1
C3a Clink
C3b
Advance Product Information
This document contains information for a product under development.
Cirrus Logic reserves the right to modify this product without notice.
Cirrus Logic, Inc.
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2010
(All Rights Reserved)
MAY ‘10
DS904A5




Cirrus Logic

CS1600 Datasheet Preview

CS1600 Datasheet

Low-cost PFC Controller

No Preview Available !

1. PIN DESCRIPTIONS
CS1600
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NC 1
STBY 2
IAC 3
FB 4
8 NC
7 VDD
6 GD
5 GND
Pin Name Pin #
NC 1, 8
I/O
-
STBY
2
IN
IAC 3 IN
FB
GND
GD
VDD
4 IN
5–
6 OUT
7 IN
Table 1. Pin Descriptions
Description
No Connect — Connect these pins to VDD to prevent any leakage path that could
arise from leaving them unterminated.
Standby — This is an active-low pin. Shorting this pin to GND disables PFC switch-
ing. The input has a pull-up resistor and should be driven with an open-collector
device. Leave this pin unterminated when not in use.
Rectified Line Voltage Sense — The IAC pin is used to sense the rectified line volt-
age. This signal, in conjunction with the signal on the FB pin, is used in the Power
Factor Correction (PFC) algorithm
A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide
noise immunity.
Feedback Voltage Sense — The FB pin is used to sense the output voltage of the
PFC stage. This signal, in conjunction with the signal on the IAC pin, is used in the
Power Factor Correction (PFC) algorithm.
A filter capacitor of up to 2.2 nF may be added between this pin and VDD to provide
noise immunity.
Ground — GND is a common reference for all the functional blocks in this device.
Gate Drive — GD is the output of the device with a source capability of 0.5 A and a
current sink capacity of 1 A.
IC Supply Voltage — VDD is the input used to provide bias to the device. This pin
has an internal shunt to ground. An external bias needs to be applied for steady-
state operation. A low-ESR ceramic decoupling capacitor at this pin is recommended
for reliable operation of this device.
2 DS904A5


Part Number CS1600
Description Low-cost PFC Controller
Maker Cirrus Logic
PDF Download

CS1600 Datasheet PDF






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