CMLT3474 Overview
Key Specifications
Max Operating Temp: 150 °C
Description
These CENTRAL SEMICONDUCTOR dual devices are low VCE(SAT) silicon transistors in an SOT-563 surface mount package designed for small signal general purpose amplifier and switching applications requiring low collector emitter saturation voltage. MARKING CODES: CMLT3410: C34 CMLT7410: C74 CMLT3474: C37 SYMBOL VCBO VCEO VEBO IC ICM PD TJ, Tstg ΘJA 40 25 6.0 1.0 1.5 350 -65 to +150 357 UNITS V V V A A mW °C °C/W NPN PNP SYMBOL TEST CONDITIONS MIN TYP TYP MAX ICBO VCB=40V 100 IEBO VEB=6.0V 100 BVCBO IC=100μA 40 BVCEO IC=10mA 25 BVEBO IE=100μA 6.0 VCE(SAT) IC=50mA, IB=5.0mA 25 30 50 VCE(SAT) IC=100mA, IB=10mA 40 50 75 VCE(SAT) IC=200mA, IB=20mA 80 95 150 VCE(SAT) IC=500mA, IB=50mA 190 205 250 VCE(SAT) IC=800mA, IB=80mA 290 320 400 VCE(SAT) IC=1.0A, IB=100mA 360 400 450 VBE(SAT) IC=800mA, IB=80mA 1.1 VBE(ON) VCE=1.0V, IC=10mA 0.9 hFE VCE=1.0V, IC=10mA 100 hFE VCE=1.0V, IC=100mA 100 300 hFE VCE=1.0V, IC=500mA 100 hFE VCE=1.0V, IC=1.0A 50 fT VCE=10V, IC=50mA, f=100MHz 100 Cob VCB=10V, IE=0, f=1.0MHz (CMLT3410) 6.0 10 Cob VCB=10V, IE=0, f=1.0MHz (CMLT7410) 10 15 UNITS nA nA V V V mV mV mV mV mV mV V V MHz pF pF R5 (29-June 2015) CMLT3410 NPN CMLT7410 PNP CMLT3474 NPN/PNP SURFACE MOUNT SILICON DUAL, LOW VCE(SAT) TRANSISTORS SOT-563 CASE - MECHANICAL OUTLINE PIN CONFIGURATIONS MARKING CODE: CMLT3410: C34 w w w.
