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CTS100ELT22TG Datasheet, CTS

CTS100ELT22TG translator equivalent, dual cmos/ttl to differential pecl translator.

CTS100ELT22TG Avg. rating / M : 1.0 rating-12

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CTS100ELT22TG Datasheet

Features and benefits


* 0.5ns Typical Propogation Delay
* <100ps Typical Output to Output Skew
* Flow Through Pinouts
* Differential PECL Output
* RoHS Compliant Pb Free Pa.

Application

that require the translation of a clock and a data signal. The CTS100ELT22 is a direct replacement for the ON Semi MC100.

Description

The CTS100ELT22 is a dual CMOS/TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline packaging and the low skew, dual gate design of the CTS100ELT22 makes it ideal for ap.

Image gallery

CTS100ELT22TG Page 1 CTS100ELT22TG Page 2 CTS100ELT22TG Page 3

TAGS

CTS100ELT22TG
Dual
CMOS
TTL
Differential
PECL
Translator
CTS100ELT22
CTS100ELT22DG
CTS100
CTS

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