ADS5271 Datasheet | Burr-Brown

FEATURES D Maximum Sample Rate: 50MSPS D 12-Bit Resolution D No Missing Codes .. D Power Dissipation: 957m W D CMOS Technology D Simultaneous Sample-and-Hold D 70.5d B SNR at 10MHz IF D Internal and External References D 3.3V Digital/Analog Supply D Serialized LVDS Outputs D Integrated Frame and Synch Patterns D MSB and LSB First Modes D Option to Double LVDS Clock Output Currents D Pin- and Format-patible Family D TQFP-80 Power PAD Package or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be latched by the receiver on both the rising and falling edges of the 6x clock. The ADS5271 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode. The device is available in a Power PAD TQFP-80 package and is specified over a - 40°C to +85°C operating range. 6X ADCLK LCLKP LCLKN PLL ADCLK 1X ADCLK ADCLKP ADCLKN IN1P IN1N IN2P IN2N IN3P IN3N IN4P IN4N IN5P IN5N IN6P IN6N IN7P IN7N IN8P IN8N S/H 12- Bit ADC Serializer OUT1P OUT1N OUT2P OUT2N OUT3P OUT3N OUT4P OUT4N OUT5P OUT5N OUT6P OUT6N OUT7P OUT7N OUT8P OUT8N S/H APPLICATIONS Portable Ultrasound Systems Tape Drives Test Equipment Optical Networking 12- Bit ADC Serializer S/H 12- Bit ADC Serializer S/H 12- Bit ADC Serializer DESCRIPTION The ADS5271 is a high-performance, 50MSPS, 8-channel, parallel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. An integrated phase lock loop multiplies the ining ADC sampling clock by a factor of 12. This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are...