AT209S Datasheet PDF - Analog Microelectronics PCI Arbiter and Clock Buffer Specs

AT209S - PCI Arbiter and Clock Buffer

Datasheet Summary

Description

The AT209S is an integrated device that contains a PCI Arbiter and a Clock Buffer.

PCI Arbiter extends system PCI devices without piecing other circuit to simplify design complexity and increase systems stability.

Features

l PCI Arbiter Extend PCI Devices from One to Three l PCI Clock Frequency Support PCI Clock range from 25MHz to 66MHz l Zero delay buffer Generate four zero delay clock sources Support frequency range from 25MHz to 66MHz l All AME's Lead Free Products Meet RoHS Standards Rev. A.01 1 AME, Inc. AT209S n Pin Configuration PCI Arbiter and Clock Buffer NC P C IS T O P # S YS R E Q # S YS G N T # P C IR E Q 1 # www. DataSheet4U. com 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 AVCC P C IC L K I P.

Datasheet Details

Part number	AT209S
Manufacturer	Analog Microelectronics
File Size	89.42 KB
Description	PCI Arbiter and Clock Buffer
Datasheet	AT209S Datasheet
Additional preview pages of the AT209S datasheet.

📁 Similar Datasheet

AT209S - PCI Arbiter and Clock Buffer (AME)

AT20-0106 - Digital Attenuator/ 50 dB/ 6-Bit/ TTL Driver/ DC - 2 GHz (Tyco Electronics)

AT20-0107 - Digital Attenuator/ 31.5 dB/ 6-Bit/ TTL Driver/ DC - 2.0 GHz (Tyco Electronics)

AT20-0263 - Digital Attenuator/ 31 dB/ 5-Bit/ TTL Driver/ DC - 2 GHz (Tyco Electronics)

AT20-0273 - Digital Attenuator/ 32 dB/ 2-Bit/ TTL Driver/ DC - 2 GHz (Tyco Electronics)

AT2002 - (AT2002/2402/2702) AT Monaural Color TV (APEX)

AT2003 - Wide Input sensorless CC/CV 2A Buck Converter (Aplustek Integrated Circuits)

AT2004 - 4 Channel ADPCM Processor (Atelic Systems)

AT2004 - 4 Channels ADPCM Processor (Atelic)

AT2005B - AT2005B (ATE)

Full PDF Text Transcription

Click to expand full text

AME, Inc. AT209S n General Description The AT209S is an integrated device that contains a PCI Arbiter and a Clock Buffer. PCI Arbiter extends system PCI devices without piecing other circuit to simplify design complexity and increase systems stability. PCI Arbiter also provides STOP# input pin with that extended PCI devices instruct the master to prematurely end the transaction on the current data phase same as one in PCI specification. Clock Buffer www.DataSheet4U.com is a high performance and low jitter zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKO feed back to the input of a build-in PLL. PCICLKI is the clock input of the Clock Buffer. In the absence of PCICLKI input, will be in the power down mode.

Published: Apr 16, 2008 |