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HMC794LP3E Datasheet

Manufacturer: Analog Devices
HMC794LP3E datasheet preview

HMC794LP3E Details

Part number HMC794LP3E
Datasheet HMC794LP3E Datasheet PDF (Download)
File Size 769.14 KB
Manufacturer Analog Devices
Description LOW NOISE PROGRAMMABLE DIVIDER
HMC794LP3E page 2 HMC794LP3E page 3

HMC794LP3E Overview

The HMC794LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3x3mm leadless surface mount package. The circuit can be programmed to divide from N = 1 to N = 4 in the 200 MHz to 2 GHz input frequency range. The high level output power (up to 10 dBm) with a very low SSB phase noise and 50% duty cycle makes this device ideal for low noise clock generation, LO generation and LO drive applications.

HMC794LP3E Applications

  • LO Generation with Low Noise Floor

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