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AD9543 - Dual DPLL/IEEE 1588 Synchronizer and Jitter Cleaner

Key Features

  • Dual DPLL synchronizes 2 kHz to 750 MHz physical layer clocks providing frequency translation with jitter cleaning of noisy references Complies with ITU-T G.8262 and Telcordia GR-253 Supports Telcordia GR-1244, ITU-T G.812, G.813, G.823, G.824, G.825, and G.8273.2 Continuous frequency monitoring and reference validation for frequency deviation as low as 50 ppb Both DPLLs feature a 24-bit fractional divider with 24-bit programmable modulus Programmable digital loop filter bandwidth: 10.
  • 4.

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Datasheet Details

Part number AD9543
Manufacturer Analog Devices
File Size 1.27 MB
Description Dual DPLL/IEEE 1588 Synchronizer and Jitter Cleaner
Datasheet download datasheet AD9543 Datasheet

Full PDF Text Transcription (Reference)

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Data Sheet Quad Input, 10-Output, Dual DPLL/IEEE 1588 Synchronizer and Jitter Cleaner AD9543 FEATURES Dual DPLL synchronizes 2 kHz to 750 MHz physical layer clocks providing frequency translation with jitter cleaning of noisy references Complies with ITU-T G.8262 and Telcordia GR-253 Supports Telcordia GR-1244, ITU-T G.812, G.813, G.823, G.824, G.825, and G.8273.2 Continuous frequency monitoring and reference validation for frequency deviation as low as 50 ppb Both DPLLs feature a 24-bit fractional divider with 24-bit programmable modulus Programmable digital loop filter bandwidth: 10−4 Hz to 1850 Hz Two independent, programmable auxiliary NCOs (1 Hz to 65,535 Hz, resolution < 1.