Datasheet Details
| Part number | AD9528 |
|---|---|
| Manufacturer | Analog Devices |
| File Size | 1.97 MB |
| Description | JESD204B/JESD204C Clock Generator |
| Datasheet |
 AD9528 Datasheet
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General Description
The AD9528 is a two-stage PLL with an integrated JESD204B/ JESD204C SYSREF generator for multiple device synchronization.
The first stage phase-locked loop (PLL) (PLL1) provides input reference conditioning by reducing the jitter present on a system clock.
Key Features
- 14 outputs configurable for HSTL or LVDS.
- Maximum output frequency.
- 6 outputs up to 1.25 GHz.
- 8 outputs up to 1 GHz.
- Dependent on the voltage controlled crystal oscillator (VCXO) frequency accuracy (start-up frequency accuracy:.