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Analog Devices Semiconductor Electronic Components Datasheet

AD9224 Datasheet

Complete 12-Bit 40 MSPS Monolithic A/D Converter

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a
FEATURES
Monolithic 12-Bit, 40 MSPS A/D Converter
Low Power Dissipation: 415 mW
Single +5 V Supply
No Missing Codes Guaranteed
Differential Nonlinearity Error: ؎0.33 LSB
Complete On-Chip Sample-and-Hold Amplifier and
Voltage Reference
Signal-to-Noise and Distortion Ratio: 68.3 dB
Spurious-Free Dynamic Range: 81 dB
Out-of-Range Indicator
Straight Binary Output Data
28-Lead SSOP Package
Compatible with 3 V Logic
Complete 12-Bit, 40 MSPS
Monolithic A/D Converter
AD9224
FUNCTIONAL BLOCK DIAGRAM
CLK
AVDD
DRVDD
VINA
VINB
SHA
MDAC1
GAIN = 16
MDAC2
GAIN = 4
MDAC3
GAIN = 4
CML
5
A/D
3
A/D
3
A/D
A/D
CAPT 5 3 3 4
CAPB
DIGITAL CORRECTION LOGIC
VREF
12
OUTPUT BUFFERS
OTR
SENSE
MODE
SELECT
1V
AD9224
BIT 1
(MSB)
BIT 12
(LSB)
REFCOM
AVSS DRVSS
PRODUCT DESCRIPTION
The AD9224 is a monolithic, single supply, 12-bit, 40 MSPS,
analog-to-digital converter with an on-chip, high performance
sample-and-hold amplifier and voltage reference. The AD9224
uses a multistage differential pipelined architecture with output
error correction logic to provide 12-bit accuracy at 40 MSPS
data rates, and guarantees no missing codes over the full operat-
ing temperature range.
The AD9224 combines a low cost high speed CMOS process
and a novel architecture to achieve the resolution and speed of
existing bipolar implementations at a fraction of the power
consumption and cost.
The input of the AD9224 allows for easy interfacing to both
imaging and communications systems. With a truly differential
input structure, the user can select a variety of input ranges and
offsets, including single-ended applications. The dynamic per-
formance is excellent.
The sample-and-hold (SHA) amplifier is well suited for both
multiplexed systems that switch full-scale voltage levels in suc-
cessive channels and sampling single-channel inputs at frequen-
cies up to and well beyond the Nyquist rate.
The AD9224’s wideband input, combined with the power and
cost savings over previously available monolithics, is suitable for
applications in communications, imaging and medical ultrasound.
The AD9224 has an onboard programmable reference. An
external reference can also be chosen to suit the dc accuracy
and temperature drift requirements of the application.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary
output format. An out-of-range signal indicates an overflow
condition which can be used with the most significant bit to
determine low or high overflow.
PRODUCT HIGHLIGHTS
The AD9224 is fabricated on a very cost effective CMOS
process. High speed precision analog circuits are now combined
with high density logic circuits.
The AD9224 offers a complete single-chip sampling 12-bit,
40 MSPS analog-to-digital conversion function in 28-lead
SSOP package.
Low Power—The AD9224 at 415 mW consumes a fraction of
the power of presently available in existing monolithic solutions.
On-Board Sample-and-Hold (SHA)—The versatile SHA
input can be configured for either single-ended or differential
inputs.
Out of Range (OTR)—The OTR output bit indicates when
the input signal is beyond the AD9224’s input range.
Single Supply—The AD9224 uses a single +5 V power supply
simplifying system power supply design. It also features a sepa-
rate digital driver supply line to accommodate 3 V and 5 V logic
families.
Pin Compatibility—The AD9224 is pin compatible with the
AD9220, AD9221, AD9223 and AD9225 ADCs.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999


Analog Devices Semiconductor Electronic Components Datasheet

AD9224 Datasheet

Complete 12-Bit 40 MSPS Monolithic A/D Converter

No Preview Available !

AD9224–SPECIFICATIONS
DC SPECIFICATIONS (AVDD = +5 V, DRVDD = +3 V, fSAMPLE = 40 MSPS, VREF = 2.0 V, VINB = 2.5 V dc, TMIN to TMAX unless otherwise noted)
Parameter
RESOLUTION
MAX CONVERSION RATE
INPUT REFERRED NOISE
VREF = 1.0 V
VREF = 2.0 V
ACCURACY
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
No Missing Codes Guaranteed
Zero Error (@ +25°C)
Gain Error (@ +25°C)1
Gain Error (@ +25°C)2
TEMPERATURE DRIFT
Zero Error
Gain Error1
Gain Error2
POWER SUPPLY REJECTION
AVDD (+5 V ± 0.25 V)
ANALOG INPUT
Input Span (VREF = 1 V)
(VREF = 2 V)
Input (VINA or VINB) Range
Input Capacitance
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2.0 V Mode)
Output Voltage Tolerance (2.0 V Mode)
Output Current (Available for External Loads)
Load Regulation3
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD
IDRVDD
POWER CONSUMPTION
Min
12
40
12
0
4.75
2.85
NOTES
1Includes internal voltage reference error.
2Excludes internal voltage reference error.
3Load regulation with 1 mA load current (in addition to that required by the AD9224).
Specifications subject to change without notice.
Typ
0.35
0.17
± 1.5
± 0.33
± 0.12
± 0.3
± 0.4
±2
± 26
± 0.4
± 0.07
2
4
10
1.0
±5
2.0
± 10
1.0
± 1.0
5
Max
± 2.5
± 1.0
± 0.3
± 2.2
± 1.6
± 0.24
AVDD
± 17
± 35
± 3.4
Units
Bits
MHz
LSB rms
LSB rms
LSB
LSB
Bits
% FSR
% FSR
% FSR
ppm/°C
ppm/°C
ppm/°C
% FSR
V p-p
V p-p
V
pF
V
mV
V
mV
mA
mV
k
5 5.25 V (± 5% AVDD Operating)
5.25 V (± 5% DRVDD Operating)
82 87
4.3 5
mA (2 V Internal VREF)
mA (2 V Internal VREF)
415 445 mW (1 V Internal Ref)
425 450 mW (2 V Internal Ref)
–2– REV. A


Part Number AD9224
Description Complete 12-Bit 40 MSPS Monolithic A/D Converter
Maker Analog Devices
Total Page 24 Pages
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