Datasheet Summary
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Preliminary Technical Data
Features
Dual 14-bit SAR ADC Simultaneous sampling Throughput rate: 4.2 MSPS per channel Specified for VDD of 2.5 V Power dissipation: 35 mW at 4.2 MSPS On-chip reference: 2.048 V ± 0.25%, 6 ppm/°C Dual conversion with read High speed serial interface SPI-/QSPI-/MICROWIRE-/DSP-patible
- 40°C to +125°C operation Shutdown mode: 10 µA maximum 16-lead TSSOP package
Differential Input, Dual, Simultaneous Sampling, 4.2 MSPS, 14-Bit, SAR ADC AD7357
FUNCTIONAL BLOCK DIAGRAM
VDD VDRIVE
VINA+ VINA- REFA T/H 14-BIT SUCCESSIVE APPROXIMATION ADC SDATAA
BUF REF BUF CONTROL LOGIC SCLK CS
REFB VINB+ VINB- T/H
14-BIT SUCCESSIVE APPROXIMATION...