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AD6652 - 12-Bit / 65 MSPS IF to Baseband Diversity Receiver

Description

4 Product Highlights 4 Specifications 5 Recommended Operating Conditions 5 ADC DC Specifications 5 ADC Switching Specifications 5 ADC AC Specifications 6 Electrical Characteristics 7 General Timing Characteristics 8 Microprocessor Port Timing Characteristics 9 Absolute Maximum Ratings 10 Therm

Features

  • SNR = 90 dB in 150 kHz bandwidth (to Nyquist @ 61.44 MSPS) Worst harmonic = 83 dBc (to Nyquist @ 61.44 MSPS) Integrated dual-channel ADC: Sample rates up to 65 MSPS IF sampling frequencies to 200 MHz Internal ADC voltage reference Integrated ADC sample-and-hold inputs Flexible analog input range (1 V to 2 V p-p) Differential analog inputs ADC clock duty cycle stabilizer 85 dB channel isolation/crosstalk Integrated wideband digital downconverter (DDC): Crossbar switched DDC inputs Digital resampl.

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Datasheet Details

Part number AD6652
Manufacturer Analog Devices
File Size 1.80 MB
Description 12-Bit / 65 MSPS IF to Baseband Diversity Receiver
Datasheet download datasheet AD6652 Datasheet

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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12-Bit, 65 MSPS IF to Baseband Diversity Receiver AD6652 FEATURES SNR = 90 dB in 150 kHz bandwidth (to Nyquist @ 61.44 MSPS) Worst harmonic = 83 dBc (to Nyquist @ 61.
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