Zero input - output propagation delay, adjustable by capacitive load on FBK input. Multiple configurations - Refer “ASM5P2304A Configurations Table”. Input frequency rang.

It is available in 8 pin package. The part has an on-chip PLL which locks to an input clock presented on Block Diagram.

ASM5P2304A is a versatile, 3.3V zero-delay buffer designed to distribute high-speed clocks in PC, workstation, datacom, telecom and other high-performance applications. It is available in 8 pin package. The part has an on-chip PLL which locks to an i.

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