Datasheet Summary
November 2003 rev 1.0
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Features
FCC approved method of EMI attenuation. Generates a low EMI spread spectrum of the input clock frequency. Optimized for input frequency range between 35MHz
- 55MHz. Internal loop filter minimizes external ponents and board space. Frequency Deviation: ±1.65%. Low inherent cycle-to-cycle jitter. 3.3 V or 5 V operating voltage. CMOS/TTL patible inputs and outputs. Ultra low power CMOS design: 5.50 mA @3.3 V. Supports notebook VGA and other LCD timing controller applications. Available in 8-pin SOIC and TSSOP. dependent signals. It allows significant system cost savings by reducing the number of circuit board layers and...