AS9C25512M2018L sram equivalent, 2.5v 512/256k x 18 synchronous dual-port sram.
* True Dual-Port memory cells that allow simultaneous access of the same memory location
* Organisation: 524,288/262,144 × 18[1]
* Fully Synchronous, independ.
The AS9C25512M2018L/AS9C25256M2018L is a high-speed CMOS 9/4.5-Mbit synchronous Dual-Port Static Random Access Memory device, organized as 524,288/262,144 × 18 bits. It incorporates a selectable Flow-Through/Pipeline output feature for user flexibili.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 1.12MB)