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AS7C33512NTF18A - 3.3V 512K x 18 Flowthrough Synchronous SRAM

General Description

The AS7C33512NTF18A family is a high performance CMOS 8 Mbit Synchronous Static Random Access Memory (Flowthrough SRAM) organized as 524,288 words × 18 bits and incorporates a LATE Write.

Key Features

  • Organization: 524,288 words × 18 bits.
  • NTD™ architecture for efficient bus operation.
  • Fast clock to data access: 7.5/8.5/10 ns.
  • Fast OE access time: 3.5/4.0 ns.
  • Fully synchronous operation.
  • Flow-through mode.
  • Asynchronous output enable control www. DataSheet4U. com.
  • Available in 100-pin TQFP.
  • Byte write enables.
  • Clock enable for operation hold.
  • Multiple chip enables for easy expansion.
  • 3.3.

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Datasheet Details

Part number AS7C33512NTF18A
Manufacturer Alliance Semiconductor Corporation
File Size 470.79 KB
Description 3.3V 512K x 18 Flowthrough Synchronous SRAM
Datasheet download datasheet AS7C33512NTF18A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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November 2004 ® AS7C33512NTF18A 3.3V 512K×18 Flowthrough Synchronous SRAM with NTDTM Features • Organization: 524,288 words × 18 bits • NTD™ architecture for efficient bus operation • Fast clock to data access: 7.5/8.5/10 ns • Fast OE access time: 3.5/4.0 ns • Fully synchronous operation • Flow-through mode • Asynchronous output enable control www.DataSheet4U.com • Available in 100-pin TQFP • Byte write enables • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.3 core power supply • 2.5V or 3.