AS7C33512NTF18A sram equivalent, 3.3v 512k x 18 flowthrough synchronous sram.
* Organization: 524,288 words × 18 bits
* NTD™ architecture for efficient bus operation
* Fast clock to data access: 7.5/8.5/10 ns
* Fast OE access time: .
requiring random access or readmodify-write operations. NTD™ devices use the memory bus more efficiently by introducing .
The AS7C33512NTF18A family is a high performance CMOS 8 Mbit Synchronous Static Random Access Memory (Flowthrough SRAM) organized as 524,288 words × 18 bits and incorporates a LATE Write. This variation of the 8Mb sychronous SRAM uses the No Turnarou.
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