Datasheet Summary
April 2005
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AS7C33512NTD32A AS7C33512NTD36A
3.3V 512K × 32/36 Pipelined SRAM with NTDTM
Features
- Organization: 524,288 words × 32 or 36 bits
- NTD™ architecture for efficient bus operation
- Fast clock speeds to 166 MHz
- Fast clock to data access: 3.4/3.8 ns
- Fast OE access time: 3.4/3.8 ns
- Fully synchronous operation
- Asynchronous output enable control
- Available in 100-pin TQFP packages ..
- Individual byte write and global write
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- Clock enable for operation hold Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with separate VDDQ Self-timed write cycles Interleaved or linear burst modes Snooze mode for...