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AS7C33512FT18A - 3.3V 512K x 18 Flow-through synchronous SRAM

General Description

The AS7C33512FT18A is a high-performance CMOS 8-Mbit synchronous Static Random Access Memory (SRAM) device organized as 524,288 words × 18 bits.

Fast cycle times of 8.5/10/12 ns with clock access times (tCD) of 7.5/8.5/10ns.

Three chip enable (CE) inputs permit easy memory expansion.

Key Features

  • Organization: 524,288 words × 18 bits Fast clock to data access: 7.5/8.5/10ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow-through operation Asynchronous output enable control Available in 100-pin TQFP package Individual byte write and global write.
  • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with separate VDDQ L.

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Datasheet Details

Part number AS7C33512FT18A
Manufacturer Alliance Semiconductor Corporation
File Size 551.92 KB
Description 3.3V 512K x 18 Flow-through synchronous SRAM
Datasheet download datasheet AS7C33512FT18A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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November 2004 ® AS7C33512FT18A 3.3V 512K × 18 Flow-through synchronous SRAM Features • • • • • • • Organization: 524,288 words × 18 bits Fast clock to data access: 7.5/8.5/10ns Fast OE access time: 3.5/4.0 ns Fully synchronous flow-through operation Asynchronous output enable control Available in 100-pin TQFP package Individual byte write and global write • • • • • • Multiple chip enables for easy expansion 3.3V core power supply 2.5V or 3.3V I/O operation with separate VDDQ Linear or interleaved burst control Snooze mode for reduced power-standby Common data inputs and data outputs www.DataSheet4U.