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Alliance Semiconductor

P2042A Datasheet Preview

P2042A Datasheet

LCD Panel EMI Reduction IC

No Preview Available !

August 2005
rev 1.3
LCD Panel EMI Reduction IC
P2042A
Features
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FCC approved method of EMI attenuation.
Provides up to 15dB of EMI suppression.
Generates a low EMI spread spectrum clock of the
input frequency.
Input frequency range: 30MHz to 110MHz.
Optimized for 32.5MHz, 54MHz, 65MHz and
108MHz pixel clock frequencies.
Internal loop filter minimizes external components
and board space.
Eight selectable high spread ranges up to ± 1.9%.
SSON# control pin for spread spectrum enable and
disable options.
Low cycle-to-cycle jitter.
3.3V ± 0.3V operating range.
Low power CMOS design.
Supports most mobile graphic accelerator and LCD
timing controller specifications.
Available in 8-pin SOIC and TSSOP Packages.
Product Description
wide reduction of EMI of down stream clock and data
dependent signals. The P2042A allows significant system
cost savings by reducing the number of circuit board
layers ferrite beads, shielding and other passive
components that are traditionally required to pass EMI
regulations.
The P2042A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
The P2042A modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
The P2042A is a versatile spread spectrum frequency
modulator designed specifically for digital flat panel
applications. The P2042A reduces electromagnetic
interference (EMI) at the clock source, allowing system
The P2042A is targeted towards digital flat panel
applications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.
Block Diagram
SR0 CP1 CP0 SSON#
VDD
CLKIN
Frequency
Divider
Feedback
Divider
Modulation
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575 Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com
Notice: The information in this document is subject to change without notice.




Alliance Semiconductor

P2042A Datasheet Preview

P2042A Datasheet

LCD Panel EMI Reduction IC

No Preview Available !

August 2005
rev 1.3
Pin Configuration
CLKIN 1
CP0 2
CP1 3
P2042A
VSS 4
8 VDD
7 SR0
6 ModOUT
5 SSON#
P2042A
Pin Description
Pin#
1
2
3
4
5
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6
7
8
Pin
Name
CLKIN
CP0
CP1
VSS
SSON#
ModOUT
SR0
VDD
Type
Description
I External reference frequency input. Connect to externally generated reference signal.
I
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
I
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
P Ground to entire chip. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
I Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
O Spread spectrum clock output.
I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
P Power supply for the entire chip
Modulation Selection
CP0 CP1 SR0
000
001
010
011
100
101
110
111
32.5MHz
0.56
1.94
1.36
1.92
1.24
1.91
0.91
1.47
Spreading Range (±%)
54MHz
65MHz
81MHz
1.05 1.00 0.98
1.68 1.56 1.48
1.05 1.00 0.92
1.68 1.56 1.48
0.81 0.66 0.40
1.29 1.02 0.74
0.45 0.34 0.05
0.71 0.54 0.36
108MHz
0.80
1.22
0.67
1.06
0.27
0.43
0.15
0.21
Modulation Rate
(KHz)
(FIN /40) * 62.49
KHz
LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 8


Part Number P2042A
Description LCD Panel EMI Reduction IC
Maker Alliance Semiconductor
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