AS6C2008 Datasheet | Alliance Semiconductor

May 2021 Rev. 1.1 ® 256K X 8 BIT LOW POWER CMOS SRAM Revision History 256K x 8 BIT LOW POWER CMOS SRAM Revision Details Rev 1.0 Initial Release Rev 1.1 Corrections in DC Specifications (Icc) & 450mils SOP package POD Date Feb 2007 May 2021 31/May/2021, v.1.1 Alliance Memory Inc. Page 1 of 14 May 2021 Rev. 1.1 ® 256K X 8 BIT LOW POWER CMOS SRAM Features Access time : 55ns Low power consumption: Operating current :14m A (TYP.) Standby current : 1µA(TYP.) Single 2.7V ~ 3.6V power supply Fully static operation Tri-state output Data retention voltage : 1.5V (MIN.) All Products ROHS pliant Package : 32-pin 450 mil SOP 32-pin 8mm x 20mm TSOP-I 32-pin 8mm x 13.4mm s TSOP 36-ball 6mm x 8mm TFBGA GENERAL DESCRIPTION The AS6C2008 is a 2,097,152-bit low power CMOS static random access memory organized as 262,144 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The AS6C2008 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. The AS6C2008 operates from a single power supply of 2.7V ~ 3.6V . PRODUCT FAMILY Product Family Operating Temperature -40 ~ 85ºC Vcc Range 2.7 ~ 3.6V Speed 55ns Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.)...