AS4LC1M16E5 dram equivalent, 3v 1m x 16 cmos dram.
* Organization: 1,048,576 words × 16 bits
* High speed
- 50/60 ns RAS access time - 20/25 ns hyper page cycle time - 12/15 ns CAS access time
* Low power cons.
The AS4LC1M16E5 features hyper page mode operation where read and write operations within a single row (or page) can be.
A0 to A9
Address inputs
RAS Row address strobe
DQ1 to DQ16 Input/output
OE Output enable
WE Write enable
UCAS
Column address strobe, upper byte
LCAS
Column address strobe, lower byte
VCC Power VSS Ground
Selection guide
Maximum RAS access.
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