AS4C128M16D3A-12BIN - 2Gb Double-Data-Rate-3 DRAM

Alliance Semiconductor

Key Features

JEDEC Standard Compliant.
Power supplies: VDD & VDDQ = +1.5V ± 0.075V.
Operating temperature: -40~95°C (TC).
Supports JEDEC clock jitter specification.
Fully synchronous operation.
Fast clock rate: 800MHz.
Differential Clock, CK & CK#.
Bidirectional differential data strobe - DQS & DQS#.
8 internal banks for concurrent operation.
8n-bit prefetch architecture.
Pipelined internal architecture.

AS4C128M16D3A-12BIN 2gb double-data-rate-3 dram by Alliance Semiconductor - Datasheet Preview

Datasheet Details

Part number	AS4C128M16D3A-12BIN
Manufacturer	Alliance Semiconductor
File Size	2.15 MB
Description	2Gb Double-Data-Rate-3 DRAM
Datasheet	AS4C128M16D3A-12BIN Datasheet

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Other Datasheets by Alliance Semiconductor

Part Number	Description
AS4C128M16D3B-12BCN	Double-data-rate architecture
AS4C128M16D3C-93BCN	128M x 16 bit DDR3 Synchronous DRAM
AS4C128M16D3LA-12BIN	128M x 16 bit DDR3L Synchronous DRAM
AS4C128M16D3LB-12BCN	Double-data-rate architecture
AS4C128M16D3LB-12BIN	2G DDR3L

Full PDF Text Transcription (Reference)

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AS4C128M16D3A-12BIN Revision History 2Gb AS4C128M16D3A-12BIN - 96 ball FBGA PACKAGE Revision Details Rev 1.0 Preliminary datasheet Date May. 2016 Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211 Alliance Memory Inc. reserves the right to change products or specification without notice Confidential -183- Rev. 1.0 May 2016 AS4C128M16D3A-12BIN 128M x 16 bit DDR3 Synchronous DRAM (SDRAM) Features • JEDEC Standard Compliant • Power supplies: VDD & VDDQ = +1.5V ± 0.