A5995 Datasheet | Allegro MicroSystems

FEATURES AND BENEFITS - 40 V output rating - Two 3.2 A DC motor drivers - Synchronous rectification - Internal undervoltage lockout (UVLO) - Thermal shutdown circuitry - Crossover-current protection - Very thin profile QFN package - Overcurrent protection - Low-power sleep mode - 3.3 and 5 V patible logic supply Package: 36-pin QFN with exposed thermal pad 0.90 mm nominal height (suffix EV) DESCRIPTION The A5995 is designed to operate at voltages up to 40 V while driving two DC motors at currents up to 3.2 A. The A5995 includes a fixed off-time pulse-width modulation (PWM) regulator for current control. The DC motors are controlled using standard PHASE and ENABLE signals. Fast or slow current decay is selected via the MODE pin. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. Protection features include thermal shutdown with hysteresis, undervoltage lockout (UVLO), crossover-current and short-circuit protection. Special power-up sequencing is not required. The A5995 is supplied in a leadless 6 mm × 6 mm × 0.9 mm, 36-pin QFN package with exposed power tab for enhanced thermal performance. The package is lead (Pb) free, with 100% matte-tin leadframe plating. Not to scale Microcontroller or Controller Logic A5995-DS, Rev. 3 MCO-0000833 0.1 µF 50 V 0.1 µF 50 V CP1 CP2 VCP VBB VBB 100 µF 50 V SLEEPn OUT1A OUT1A MODE1 PHASE1 ENABLE1 VREF1 MODE2 PHASE2 ENABLE2 VREF2 OUT1B OUT1B SENSE1 SENSE1 OUT2A OUT2A OUT2B OUT2B SENSE2 SENSE2 GND GND Figure 1:Typical Application Circuit 0.22 µF 50 V April 30, 2021 DMOS Dual Full-Bridge PWM Motor Driver SELECTION GUIDE Part...