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Agere Systems

L9218G Datasheet Preview

L9218G Datasheet

Low-Cost Line Interface

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Data Sheet
November 2001
L9218A/G Low-Cost Line Interface
Features
s Basic forward battery only SLIC functionality at a
low cost
s Pin compatible with Agere Systems Inc. L9219 and
L9217 SLIC
s Low active power (typical 138 mW during on-hook
transmission)
s Low-power scan mode for low-power, on-hook
power dissipation (59 mW typical)
s Minimal external components
s Distortion-free, on-hook transmission
s Convenient operating states:
— Forward battery low current limit
— Forward battery high current limit
— Low-power scan
— Disconnect (high impedance)
s Adjustable supervision functions:
— Off-hook detector with hysteresis
— Ring trip detector
s Logic controlled high and low current limit
s Two gain options to optimize the codec interface
s Thermal protection with thermal shutdown indica-
tion
Description
This general-purpose electronic subscriber loop
interface circuit (SLIC) is optimized for low cost, while
still providing a satisfactory set of features.
The L9218 is pin-for-pin compatible with the Agere
L9219 and L9217 SLICs.
The L9218 requires a 5 V power supply and single
battery to operate. This is a forward battery only
device. Additionally, a low-power scan mode,
wherein all circuitry except the off-hook supervision is
shut down to conserve power, is available.
Via the logic inputs, a low or high current limit may be
selected. The low value is set via a single external
resistor, and the high value is 1.4 times the low value.
Device overhead is fixed and is adequate for
3.14 dBm into 900 of on-hook transmission.
Both the loop supervision and ring trip supervision
functions are offered with user-controlled thresholds
via external resistors.
The L9218 is offered with a receive gain that is opti-
mized for interface to a first-generation type codec
(L9218A). It is also offered with a gain option that is
optimized for interface to a third- or fourth-generation
type codec (L9218G). In both cases, minimizing
external components required at this interface. In the
receive direction, the device may be dc-coupled to a
third-generation codec. No dc blocking capacitors
are needed.
Data control is via a parallel data control scheme.
The device is available in a 28-pin PLCC package. It
is built by using a 90 V complementary bipolar
(CBIC) process.




Agere Systems

L9218G Datasheet Preview

L9218G Datasheet

Low-Cost Line Interface

No Preview Available !

L9218A/G Low-Cost Line Interface
Data Sheet
November 2001
Table of Contents
Contents
Page Figures
Page
Features ......................................................................1
Description...................................................................1
Pin Information ............................................................4
Functional Description .................................................6
Absolute Maximum Ratings (at TA = 25 °C) ................7
Recommended Operating Conditions .........................7
Electrical Characteristics .............................................8
Ring Trip Requirements ..........................................12
Test Configurations ...................................................13
Applications ...............................................................15
dc Applications....................................................... 19
Battery Feed.........................................................19
Current Limit.........................................................19
Overhead Voltage ............................................... 19
Loop Range..........................................................20
Off-Hook Detection...............................................20
Ring Trip Detection...............................................21
Longitudinal Balance.............................................. 21
ac Design ............................................................... 22
Codec Types ........................................................22
ac Interface Network ............................................22
Receive Interface .................................................22
Example 1: Real Termination (First-
Generation Codec) .............................................. 23
Example 2: Complex Termination (First-
Generation Codec) ...............................................25
Power Derating ...................................................... 27
Pin-for-Pin Compatibility with L9217/L9219 ........... 27
PCB Layout Information ............................................27
Outline Diagram.........................................................28
28-Pin PLCC .......................................................... 28
Ordering Information..................................................29
Figure 15. Ring Trip Equivalent Circuit and
Equivalent Application ........................... 21
Figure 16. ac Equivalent Circuit .............................. 23
Figure 17. Interface Circuit Using First-
Generation Codec (±5 V Battery) .......... 26
Figure 18. Interface Circuit Using First-
Generation Codec (5 V Only Codec) ..... 26
Tables
Page
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 9.
Table 10.
Table 11.
Pin Descriptions ...................................... 4
Input State Coding .................................. 6
Supervision Coding ................................. 6
Power Supply .......................................... 8
2-Wire Port .............................................. 9
Analog Pin Characteristics .................... 10
ac Feed Characteristics ...................... 11
Parts List for Loop Start Application
Circuit Using T7504-Type Codec .......... 16
200 Ω + 680 Ω || 0.1 µF First-
Generation Codec Design Parameters . 17
Parts List for Loop Start Application
Circuit Using T8536-Type Codec .......... 18
Figures
Page
Figure 1. Functional Diagram...................................3
Figure 2. 28-Pin PLCC.............................................4
Figure 3. Ring Trip Circuits ....................................12
Figure 4. L9218 Basic Test Circuit.........................13
Figure 5. Metallic PSRR.........................................13
Figure 6. Longitudinal PSRR .................................13
Figure 7. Longitudinal Balance ..............................14
Figure 8. RFI Rejection ..........................................14
Figure 9. Longitudinal Impedance..........................14
Figure 10. ac Gains..................................................14
Figure 11. Basic Loop Start Application
Circuit Using T7504-Type Codec............15
Figure 12. Basic Loop Start Application
Circuit Using T8536-Type Codec............17
Figure 13. Loop Current vs. Loop Voltage ...............19
Figure 14. Off-Hook Detection Circuit ......................20
2
Agere Systems Inc.


Part Number L9218G
Description Low-Cost Line Interface
Maker Agere Systems
Total Page 30 Pages
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