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UT54ACTS220 - Clock and Wait-State Generation Circuit

Description

The UT54ACTS220 is designed to be a companion chip to UTMC’s UT69151 SμMMIT family for the purpose of generating clock and wait-state signals.

The device contains a divide by two circuit that accepts TTL input levels and drives CMOS output buffers.

Features

  • ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 14-pin DIP - 14-lead flatpack ‰ UT54ACTS220 - SMD 5962-96753.

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Datasheet Details

Part number UT54ACTS220
Manufacturer Aeroflex Circuit Technology
File Size 238.31 KB
Description Clock and Wait-State Generation Circuit
Datasheet download datasheet UT54ACTS220 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Standard Products UT54ACTS220 Clock and Wait-State Generation Circuit Datasheet November 2010 www.aeroflex.com/logic FEATURES ‰ 1.2μ CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package - 14-pin DIP - 14-lead flatpack ‰ UT54ACTS220 - SMD 5962-96753 DESCRIPTION The UT54ACTS220 is designed to be a companion chip to UTMC’s UT69151 SμMMIT family for the purpose of generating clock and wait-state signals. The device contains a divide by two circuit that accepts TTL input levels and drives CMOS output buffers. The chip accepts a 48MHz clock and generates a 24MHz clock. The 48MHz clock can have a duty cycle that varies by ± 20%. The UT54ACT220 generates a 24MHz clock with a ± 5% duty cycle variation.
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