Datasheet Summary
Standard Products
Clock and Wait-State Generation Circuit
Datasheet November 2010 .aeroflex./logic
Features
1.2μ CMOS
- Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package
- 14-pin DIP
- 14-lead flatpack UT54ACTS220
- SMD 5962-96753
DESCRIPTION
The UT54ACTS220 is designed to be a panion chip to UTMC’s UT69151 SμMMIT family for the purpose of generating clock and wait-state signals. The device contains a divide by two circuit that accepts TTL input levels and drives CMOS output buffers. The chip accepts a 48MHz clock and generates a 24MHz clock. The 48MHz clock can have a duty cycle that...