AT25QL641
Key Features
- The flexible erase architecture of the AT25QL641 is ideal for data storage as well, eliminating the need for additional data storage devices
- The erase block sizes of the AT25QL641 have been optimized to meet the needs of today's code and data storage applications
- By optimizing the size of the erase blocks, the memory space can be used much more efficiently
- Up to 256 bytes can be programmed at a time using the Page Program instructions
- Pages can be erased 4 KB block, 32 KB block, 64 KB block, or the entire chip
- The devices operate on a single 1.7V to 1.95V power supply with current consumption as low as 5 mA active and 2 µA for Deep Power Down (DPD)
- All devices offered in space-saving packages
- The device supports JEDEC standard manufacturer and device identification with a 4 Kbit secured OTP
- 8-SOIC (Top View) Figure 1-2
- All of the input and output signals must be held high or low (according to voltages of VIH, VOH, VIL or
