• 80C52 Compatible
– 8051 Pin and Instruction Compatible
– Four 8-bit I/O Ports
– Three 16-bit Timer/Counters
– 256 Bytes Scratchpad RAM High-speed Architecture 40 MHz at 5V, 30 MHz at 3V X2 Speed Improvement Capability (6 Clocks/Machine Cycle)
– 30 MHz at 5V, 20 MHz at 3V (Equivalent to 60 MHz at 5.