ATR0601 Datasheet | Atmel

Features - - - - - - - - Very Low Power Design (40 m W) Single IF Architecture Excellent Noise Performance 1.5-bit ADC On Chip Small QFN Package (4 mm × 4 mm, 24 pins) Highly integrated, Few External ponents Advanced Bi CMOS Technology (UHF6s) Non ESD Sensitive Device GPS Front-end IC ATR0601 Preliminary 1. Description The ATR0601 is a single IF GPS front-end IC, designed to meet the requirements of mobile and automotive applications. Excellent RF performance bined with low noise figure enables high quality GPS solutions and it's very low power consumption fits perfectly to portable devices. Featuring a balanced XTO and a fully integrated balanced frequency synthesizer, only few external ponents are required. The ATR0601 offers a plete autonomous mode, utilizing the on chip AGC in closed loop operation, to set the gain of the IF VGA. Alternatively, in bination with the baseband processor ATR0621 the optimum gain of the IF VGA can be puted and set by software, using the digital SDI interface. Figure 1-1. Block Diagram VDIG NBPI AGCO BPI EGC VCC BP NBP PUXTO PURF PMSS Logic 1 A RF NRF A D VCO PLL XTO NXTO XTO X NX D TEST Rev. 4866A- GPS- 08/05 Data Sheet 4 U . .. 2. Pin Configuration Figure 2-1. Pinning QFN24 SC SH SL SDI EGC VCC 24 23 22 21 20 19 VDIG AGCO NXTO NX X XTO 1 2 3 4 5 6 18 17 16 15 14 13 PURF PUXTO NBPI BPI NBP BP Paddle GND 7 8 9 10 11 12 VCC MO TEST NRF RF NC Table 2-1. Pin Paddle 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Note: Pin Description Symbol GND VDIG AGCO NXTO NX X XTO VCC MO TEST NRF RF NC BP NBP BPI NBPI PUXTO PURF VCC EGC SDI SL SH SC Type(1) S S A_I/O A_I A_O A_O A_I S A_O A_I A_I A_I - A_O A_O A_I A_I D_I D_I S D_I D_I D_O D_O D_O Function mon ground Digital supply AGC: gain control voltage output/corner frequency determination XTO interface (optional: TCXO input) XTO interface XTO interface XTO interface (optional: TCXO input) Analog supply Testbuffer output (f IF) Enable...