ATR0600 GPS Front-End
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Very Low Power Design (≈ 50 mW) Single IF Concept 2-bit ADC on Chip Small QFN Package (28 Pins) Highly Integrated, Few External Components.
and navigation systems. Figure 1. Block Diagram 96.76 MHz 1575.42 MHz LC-BP VS3 LNA RFIN Preliminar.
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