ATC18 Datasheet | Atmel

Features - 64K x 32-bit Flash Embedded Memory Cell - Fast Read Access Time - - - Random Access Time: 70 ns Worst Case (Process, Voltage, Temperature) - Page Access Time: 40 ns Worst Case (Process, Voltage, Temperature) Single Supply Voltage: 1.8V ±10% Page Program Operation - 1024 Pages (64 Words/Page) - Internal Data Latches For 64 Words - Read Capability During Data Load Program Cycle Time: 4 ms per Page Including Auto-erase Full Chip Erase Available in 10 ms rdybsyn Signal For End of Program Detection Very Low Power Dissipation - 8 m A Active Current in Write and Erase - 4 m A Active Current in Random Read - 30 µA Stand-by Current High Reliability CMOS Technology - Typical Endurance: 100K Write/Word - Data Retention: 10 Years Erased State (Charged Gate) Is a Logic “1” - - - - Embedded ASIC Memory Cell ATC18 64K x 32-bit Low-power Flash Advance Information - - Description The 64K x 32-bit cell is an embedded 2-Mbit Flash electrically erasable and programmable read only memory with a power supply of 1.8V ±10%. The memory is organized as 1024 pages of 64 32-bit words each. The device uses the Atmel ATC18 0.18 µm silicon process. For easy reprogrammability, it does not require a high input voltage for programming: the embedded Flash can be operated with a single 1.8V ±10% power supply. Re-programming the cell is performed on a page basis: the words to be written (from a minimum of 1 word to a maximum of 64 words) are loaded into the device and then simultaneously written into the targeted page after the full page has been erased during the auto-erase phase. 2 ms are necessary to erase the page, followed by 2 ms to write the words, independent of the number of words that are written in parallel into the targeted page. Thus the write time after the auto-erase varies from a maximum of 2 ms per word if only 1 word is written to a minimum of 32 µs per word if the entire page is written at a time. Memory read is allowed during data loading and forbidden once...