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AT40K20AL - 5K - 50K Gates Coprocessor FPGA

Download the AT40K20AL datasheet PDF. This datasheet also covers the AT40K05AL variant, as both devices belong to the same 5k - 50k gates coprocessor fpga family and are provided as variant models within a single manufacturer datasheet.

Description

The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10ns programmable synchronous/asynchronous, dual-port/single-port SRAM, eight global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generators, and range in si

Features

  • Ultra High Performance ̶ System Speeds to 100MHz ̶ Array Multipliers > 50MHz ̶ 10ns Flexible SRAM ̶ Internal Tri-state Capability in Each Cell.
  • FreeRAM™ ̶ Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM ̶ 2,048.
  • 18,432 bits of Distributed SRAM Independent of Logic Cells.
  • 128.
  • 384 PCI Compliant I/Os ̶ Programmable Output Drive ̶ Fast, Flexible Array Access Facilitates Pin Locking ̶ Pin-compatible with XC4000 and XC5200 FPGAs.
  • Eight Global Cloc.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (AT40K05AL-ATMEL.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
AT40K05AL, AT40K10AL AT40K20AL, AT40K40AL 5K – 50K Gates Coprocessor FPGA with FreeRAM™ DATASHEET Features  Ultra High Performance ̶ System Speeds to 100MHz ̶ Array Multipliers > 50MHz ̶ 10ns Flexible SRAM ̶ Internal Tri-state Capability in Each Cell  FreeRAM™ ̶ Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM ̶ 2,048 – 18,432 bits of Distributed SRAM Independent of Logic Cells  128 – 384 PCI Compliant I/Os ̶ Programmable Output Drive ̶ Fast, Flexible Array Access Facilitates Pin Locking ̶ Pin-compatible with XC4000 and XC5200 FPGAs  Eight Global Clocks ̶ Fast, Low Skew Clock Distribution ̶ Programmable Rising/Falling Edge Transitions ̶ Distributed Clock Shutdown Capability for Low Power Management ̶ Global Reset/Asynchronous Reset Options ̶ Four Additional Dedicated PCI
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