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AT40K05AL - 5K - 50K Gates Coprocessor FPGA

Datasheet Summary

Description

The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10ns programmable synchronous/asynchronous, dual-port/single-port SRAM, eight global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generators, and range in si

Features

  • Ultra High Performance ̶ System Speeds to 100MHz ̶ Array Multipliers > 50MHz ̶ 10ns Flexible SRAM ̶ Internal Tri-state Capability in Each Cell.
  • FreeRAM™ ̶ Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM ̶ 2,048.
  • 18,432 bits of Distributed SRAM Independent of Logic Cells.
  • 128.
  • 384 PCI Compliant I/Os ̶ Programmable Output Drive ̶ Fast, Flexible Array Access Facilitates Pin Locking ̶ Pin-compatible with XC4000 and XC5200 FPGAs.
  • Eight Global Cloc.

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Datasheet preview – AT40K05AL

Datasheet Details

Part number AT40K05AL
Manufacturer ATMEL
File Size 1.09 MB
Description 5K - 50K Gates Coprocessor FPGA
Datasheet download datasheet AT40K05AL Datasheet
Additional preview pages of the AT40K05AL datasheet.

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Full PDF Text Transcription

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AT40K05AL, AT40K10AL AT40K20AL, AT40K40AL 5K – 50K Gates Coprocessor FPGA with FreeRAM™ DATASHEET Features  Ultra High Performance ̶ System Speeds to 100MHz ̶ Array Multipliers > 50MHz ̶ 10ns Flexible SRAM ̶ Internal Tri-state Capability in Each Cell  FreeRAM™ ̶ Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM ̶ 2,048 – 18,432 bits of Distributed SRAM Independent of Logic Cells  128 – 384 PCI Compliant I/Os ̶ Programmable Output Drive ̶ Fast, Flexible Array Access Facilitates Pin Locking ̶ Pin-compatible with XC4000 and XC5200 FPGAs  Eight Global Clocks ̶ Fast, Low Skew Clock Distribution ̶ Programmable Rising/Falling Edge Transitions ̶ Distributed Clock Shutdown Capability for Low Power Management ̶ Global Reset/Asynchronous Reset Options ̶ Four Additional Dedicated PCI
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