AT40K05AL Datasheet | Atmel

Features - Ultra High Performance ̶ System Speeds to 100MHz ̶ Array Multipliers > 50MHz ̶ 10ns Flexible SRAM ̶ Internal Tri-state Capability in Each Cell - Free RAM™ ̶ Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM ̶ 2,048 - 18,432 bits of Distributed SRAM Independent of Logic Cells - 128 - 384 PCI pliant I/Os ̶ Programmable Output Drive ̶ Fast, Flexible Array Access Facilitates Pin Locking ̶ Pin-patible with XC4000 and XC5200 FPGAs - Eight Global Clocks ̶ Fast, Low Skew Clock Distribution ̶ Programmable Rising/Falling Edge Transitions ̶ Distributed Clock Shutdown Capability for Low Power Management ̶ Global Reset/Asynchronous Reset Options ̶ Four Additional Dedicated PCI Clocks - Cache Logic® Dynamic Full/Partial Re-configurability In-System ̶ Unlimited Re-programmability via Serial or Parallel Modes ̶ Enables Adaptive Designs ̶ Enables Fast Vector Multiplier Updates - Pin-patible Package Options ̶ Low-profile, Plastic Quad Flat Packs (LQFP and PQFP) - User-friendly Design Tools ̶ Supoorted by industry standard EDA tools such as Precision Synthesis, Leondardo Spectrum, Synplify, and Others ̶ Timing Driven Placement and Routing ̶ Automatic/Interactive Multi-chip Partitioning ̶ Fast, Efficient Synthesis ̶ Over 75 Automatic ponent Generators Create 1000s of Reusable, Fully Deterministic Logic, and RAM Functions - Supply Voltage 3.3V - 5V I/O Tolerant Atmel-2818G-FPGA-AT40KAL-Series-Datasheet_092013 Table 1. AT40KAL Family(1) Device Usable Gates Rows x Columns Cells Registers RAM Bits I/O (Maximum) AT40K05AL 5K - 10K 16 x 16 256 496(1) 2,048 128 AT40K10AL 10K - 20K 24 x 24 576 954(1) 4,608 192 Note: 1. Packages with FCK will have eight less registers. AT40K20AL 20K - 30K 32 x 32 1,024 1,520(1) 8,192 256 AT40K40AL 40K - 50K 48 x 48 2,304 3,048(1) 18,432 384 1. Description The AT40KAL is a family of fully PCI-pliant, SRAM-based FPGAs with distributed 10ns programmable synchronous/asynchronous, dual-port/single-port SRAM, eight global clocks, Cache...