AS81F641642C dram equivalent, 1m x 16 bit x 4 banks synchronous dram.
JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length (.
PIN ASSIGNMENT Top View
V DD DQ 0 VDD Q DQ 1 DQ 2 VSSQ DQ 3 DQ 4 VDD Q DQ 5 DQ 6 VSSQ DQ 7 V DD L DQ M WE C AS R AS CS.
The AS81F641642C is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 1,048,576 words by 16 bits. Synchronous design allows precise cycle controls with the use of system clock I/O transactions are possible on every clock cycle. .
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