ADSP-21060LC processor equivalent, sharc processor.
240-lead thermally enhanced MQFP_PQ4 package, 225-ball plastic ball grid array (PBGA), 240-lead hermetic CQFP package RoHS compliant packages
KEY FEATURES—PROCESSOR CORE.
Super Harvard Architecture 4 independent buses for dual data fetch, instruction fetch, and nonintrusive I/O 32-bit IEEE .
......... 4 SHARC Family Core Architecture ........ 4 Memory and I/O Interface Features ....... 5 Development Tools ....... 8 Evaluation Kit .... 9 Designing an Emulator-Compatible DSP Board (Target) 9 Additional Information .. 9 Pin Function Descrip.
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