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LP62S2048M-70LLT - 256K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description

The LP62S2048-T is a low operating current 2,097,152bit static random access memory organized as 262,144 words by 8 bits and operates on a low power supply range: 2.7V to 3.3V.

It is built using AMIC's high performance CMOS process.

Key Features

  • n Power supply range: 2.7V to 3.3V n Access times: 70/100 ns (max. ) n Current: Low power version: Operating: 30mA (max. ) Standby: 50µA (max. ) Very low power version: Operating: 30mA (max. ) Standby: 10µA (max. ) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Output enable and two chip enable inputs for easy.

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Datasheet Details

Part number LP62S2048M-70LLT
Manufacturer AMIC Technology
File Size 190.81 KB
Description 256K X 8 BIT LOW VOLTAGE CMOS SRAM
Datasheet download datasheet LP62S2048M-70LLT Datasheet

Full PDF Text Transcription for LP62S2048M-70LLT (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for LP62S2048M-70LLT. For precise diagrams, and layout, please refer to the original PDF.

LP62S2048-T Series 256K X 8 BIT LOW VOLTAGE CMOS SRAM Features n Power supply range: 2.7V to 3.3V n Access times: 70/100 ns (max.) n Current: Low power version: Operating...

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Access times: 70/100 ns (max.) n Current: Low power version: Operating: 30mA (max.) Standby: 50µA (max.) Very low power version: Operating: 30mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Output enable and two chip enable inputs for easy application n Data retention voltage: 2V (min.) n Available in 32-pin SOP, TSOP, TSSOP (8 X 13.4mm) and 36-pin CSP packages General Description The LP62S2048-T is a low operating current 2,097,152bit static random access memory organized as 262,144 words by

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