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LP62S16256G - 256K X 16-Bit Low Voltage CMOS SRAM

Description

The LP62S16256G-T is a low operating current 4,194,304-bit static random access memory organized as 262,144 words by 16 bits and operates on low power voltage from 2.7V to 3.6V.

It is built using AMIC's high performance CMOS process.

Features

  • Operating voltage: 2.7V to 3.6V.
  • Access times: 55ns / 70ns (max. ).
  • Current: Very low power version: Operating: 40mA (max. ) Standby: 10µA (max. ).
  • Full static operation, no clock or refreshing required.
  • All inputs and outputs are directly TTL-compatible.
  • Common I/O using three-state output.
  • Data retention voltage: 2.0V (min. ).
  • Available in 44-pin TSOP and 48-ball CSP (6 × 8mm) packages.
  • All Pb-free (Lead-free) produc.

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Datasheet Details

Part number LP62S16256G
Manufacturer AMIC Technology
File Size 249.85 KB
Description 256K X 16-Bit Low Voltage CMOS SRAM
Datasheet download datasheet LP62S16256G Datasheet

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Part Number Description
LP62S16256G-I 256K x 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16256E-I 256K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16256E-T 256K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16256EU-55LLI 256K X 16 BIT LOW VOLTAGE CMOS SRAM
LP62S16256EU-55LLT 256K X 16 BIT LOW VOLTAGE CMOS SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com LP62S16256G-T Series Preliminary Document Title 256K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 0.1 History Initial issue Change temperature from 0°C-70°C to -10°C-70°C Issue Date June 6, 2006 November 17, 2006 Remark Preliminary 256K X 16 BIT LOW VOLTAGE CMOS SRAM PRELIMINARY (November, 2006, Version 0.1) AMIC Technology, Corp. www.DataSheet4U.com LP62S16256G-T Series Preliminary Features „ Operating voltage: 2.7V to 3.6V „ Access times: 55ns / 70ns (max.) „ Current: Very low power version: Operating: 40mA (max.) Standby: 10µA (max.) „ Full static operation, no clock or refreshing required „ All inputs and outputs are directly TTL-compatible „ Common I/O using three-state output „ Data retention voltage: 2.0V (min.
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