A48P3616B dram equivalent, 8m x 16-bit ddr dram.
CAS Latency and Frequency
CAS Latency
2 2.5 3
Maximum Operating Frequency (MHz) DDR400 (5) 133 166 200
* Double data rate architecture: two data transfers per cloc.
The 128Mb DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation. The double data rate architecture is essentially a 2n prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pin.
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